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NXP Semiconductors /LPC18xx /I2C0 /ADR0

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Interpret as ADR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GC)GC 0Address0RESERVED

Description

I2C Slave Address Register 0. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address.

Fields

GC

General Call enable bit.
Address

The I2C device address for slave mode.
RESERVED

Reserved. The value read from a reserved bit is not defined.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data